Display Timing & EDID Reference

Look up standard video timings from CTA-861 and VESA DMT with their blanking, sync and pixel clock, work out a CVT reduced-blanking timing for any resolution, and decode an EDID dump to see what a display says it supports.

Standard Timings

Select a row to see its full timing and a diagram. Click a column heading to sort. Search by resolution, rate or code (for example 1080p50, VIC 97, 2560 or RB).

Loading timings…
Total H FP / Sync / BP V FP / Sync / BP Sync H/V

Interlaced vertical values are per field. CTA timings at 24, 30, 48, 60, 120 and 240 Hz also run at ×1000/1001 (23.98, 29.97, 59.94 Hz…) with the pixel clock divided by 1.001. Both rates are shown.

Timing Detail: —

CVT Reduced Blanking Calculator

Works out a VESA CVT 1.2 reduced-blanking timing for a custom resolution, such as an LED processor input or an unusual projector raster. RB v1 uses 160 px of horizontal blanking and a 0.25 MHz clock step. RB v2 uses 80 px and a 0.001 MHz step, and supports the 1000/1001 video rates.

px
lines
Hz
Pixel Clock
—
Total (H × V)
—
H Frequency
—
Actual Refresh
—
H Front / Sync / Back
—
V Front / Sync / Back
—
Sync Polarity (H/V)
—
24-bit RGB Data Rate
—

EDID Decoder

Paste a 128- or 256-byte EDID as hex, from a hexdump, xrandr --verbose, an EDID manager or a processor's web page. Spaces, line breaks, 0x prefixes and line offsets are ignored. Everything is decoded in your browser and nothing is uploaded.

The sample is a made-up UHD HDMI 2.0 display (manufacturer code STK) built for this page, with valid checksums.

Notes & References

  • CTA-861 timings: CTA-861-G, Tables 1 and 2 (Video Format Timings). Every VIC in the table was checked against both the standard and the Linux kernel's drm_edid.c table. VICs 8, 9, 12, 13, 23, 24, 27 and 28 (240p/288p) are left out because CTA lists more than one line count for them. The 480i/576i formats are shown as sent over HDMI, with pixel repetition (1440 samples, 27 MHz).
  • VESA DMT timings: VESA Display Monitor Timing Standard v1.0 rev 13. Borders, where a DMT timing defines them (such as 640×480 at 60 Hz), are folded into the porches, as EDID detailed timings do.
  • CVT reduced blanking: VESA Coordinated Video Timings Standard v1.2, section 5.4. The calculator reproduces all 25 reduced-blanking timings in DMT rev 13 exactly, for example 1920×1200 at 60 Hz RB = 154.000 MHz and 4096×2160 at 59.94 Hz RB v2 = 556.188 MHz. The CVT rows in the table (such as 2560×1440 and 3840×2160 RB) are calculated, not listed in DMT.
  • EDID: VESA E-EDID Release A rev 2 (EDID 1.4) for the base block. CTA-861-G section 7 for the CTA extension (video, audio, speaker and HDR data blocks). The HDMI Licensing VSDB (OUI 00-0C-03) and HDMI Forum VSDB (OUI C4-5D-D8) are decoded only as far as their max TMDS clock, deep colour and FRL fields.
  • Pixel clock = H total × V total × frame rate. H frequency = pixel clock ÷ H total. Data-rate figures on this page are uncompressed 24-bit RGB on the active-plus-blanking raster. Use the Video Bandwidth Calculator to check which links can carry other bit depths and chroma formats.
  • Related: Aspect Ratio Calculator · LED Wall Calculator